1. Field of the Invention
The present invention relates to a non-volatile memory and fabricating method thereof. More particularly, the present invention relates to a non-volatile memory and fabricating method thereof that can improve the electrical properties and the reliability of the memory device.
2. Description of the Related Art
At present, one of the most common types of non-volatile memory is an electrically erasable programmable read-only-memory (EEPROM) called the ‘flash memory’. Flash memory allows multiple data writing, reading and erasing operations. Furthermore, the stored data will be retained even after power to the device is removed. With these advantages, flash memory has become one of the most widely adopted non-volatile memories for personal computer and electronic equipment.
A typical flash memory has a floating gate and a control gate fabricated using doped polysilicon. In the process of programming data into a flash memory cell, the electrons injected into the floating gate will distribute evenly throughout the entire doped polysilicon floating gate layer. However, if the tunneling oxide layer underneath the doped polysilicon floating gate has some defects, a leakage current may flow from the device and lead to a drop in the overall reliability of the device.
To resolve the aforementioned leakage problem in the flash memory, a non-volatile memory having a charge trapping layer instead of the doped polysilicon floating gate called a silicon-oxide-nitride-oxide-semiconductor (SONOS) has been developed. Because a SONOS memory has an oxide-nitride-oxide (ONO) composite dielectric layer structure, the nitride layer can serve as a trapping layer for electrons. In general, programming can be achieved by injecting channel hot electrons (CHE) from the bottom oxide layer of the oxide-nitride-oxide (ONO) composite dielectric layer structure. Conversely, to erase stored data within the memory device, tunneling enhanced hot holes (TEHH) can be injected through the bottom oxide layer of the oxide-nitride-oxide (ONO) composite dielectric layer structure. Thus, the SONOS memory is one important type of device that can combat leakage problems. However, as the dimension of devices continues to decrease, errors resulting from charge migration in the charge trapping layer inside the aforementioned SONOS memory occurs more frequently.
In recent years, a type of memory with charge trapping occurring in the oxide-nitride-oxide dielectric structure (shown in FIG. 1) on each side of the gate has been developed. FIG. 1 is a schematic cross-sectional view of a conventional non-volatile memory. As shown in FIG. 1, the word line 120 of the silicon-oxide-nitride-oxide-semiconductor (SONOS) memory is formed on a gate oxide layer 110 above the substrate 100. The control gates 170 are formed on the sidewalls of the word line 120 and are shaped like a spacer. The word line 120 and the control gate 170 as well as the control gate 170 and the substrate 100 are separated from each other by an oxide-nitride-oxide (ONO) composite structure comprising a bottom dielectric layer 140, a charge trapping layer 150 and a dielectric cap layer 160. The source 180 and the drain 190 are formed in the substrate 100 beside the control gate spacer 170 on each side of the word line 120.
In the process of programming the device, because the charges are trapped inside the charge trapping layer 150 on each side of the word line 120, charge migration problem due to device miniaturization can be avoided. However, electric charges trapped inside the oxide-nitride-oxide (ONO) structures on the sidewalls of the word line within the SONOS non-volatile memory are difficult to remove. Hence, charges will accumulate and ultimately will lead to device reliability problems.
On the other hand, because the control gate is shaped like a spacer, the control gate has an arc surface instead of a plane surface. In the subsequent process of fabricating a contact, a good electrical connection between the contact and the control gate spacer is difficult.
In addition, the etching back operation used in the process of forming the control gate spacers may damage the oxide-nitride-oxide (ONO) structure. Therefore, a short circuit is easily formed when a silicide layer is subsequently formed between the word line and the control gate spacers.